論文

A sol-gel method to prepare inorganic complex fluorides, SrAlF5 and BaMgF4 is described. Metal acetates and alkoxide were used as starting materials, and trifluoroacetic acid was used as a fluorine source. The formation of the fluorides was examined using thermal analysis, X-ray diffraction (XRD) and infrared (IR) absorption. The fluorides were formed through the highly exothermic decomposition reaction of trifluoroacetate gels at temperatures around 321-339°C. The heating time necessary to produce SrAlF5 and BaMgF4 powder samples was considerably reduced in the sol-gel process as compared to the solid-state reaction between SrF2 and AlF3 or BaF2 and MgF2. It is also shown that BaMgF4 thin films could be prepared by the sol-gel process using a spin-coating technique. The characteristics of the films were investigated with a field emission scanning electron microscope and a spectrophotometer. © 2000 Elsevier Science S.A.

The Ag/MgF2 and ZnO/MgF2 nanocomposite thin films were prepared using the sol-gel method. The films' optical properties were examined. The Ag/MgF2 films exhibited the absorption at wavelength around 394-419 nm due to SPR. The ZnO/MgF2 films showed intense photoluminescence. The procedure employed showed a potential way to tailor fluoride-based composite materials.

A nonvolatile crossbar switch using a dual-layered TiOx/ TaSiOy solid electrolyte, "NanoBridge," has been developed. NanoBridge is scalable to 50 nm and programmed at low voltage while keeping a low on -resistance. The high compatibility with a back-end-of-line processing for CMOS integrated circuits is achieved by using the dual-layered TiO x/TaSiOy solid electrolyte, in which a barrier (Ti) is inserted on Cu and changes to an oxide during the subsequent process step. TiOx has the double role of preventing Cu oxidation during TaSiO y deposition and acting as a solid electrolyte itself. A resistive-change characteristic is investigated in terms of the inserted barrier dependence. At an optimal barrier insertion, the integrated switch shows bipolar switching characteristics with a high off-/on-resistance ratio of 106. The developed device is applied to a 4 × 4 crossbar switch integrated with the CMOS circuit. The crossbar switch is configured without select transistors and transfers signals properly. © 2006 IEEE.

The dc current-stress tolerance of the ON-state Cu atom switch is evaluated at elevated temperature. It is revealed that the reset-direction current stress causes time-dependent failures, which originate from the E-field-driven diffusion of Cu in the conducting bridge. A new empirical lifetime estimation model, including the Joule heating effect, gives an allowable maximum current per atom switch of Imax= 115 μA, which is large enough to satisfy the requirements for signal routing under currents that are average (18 μA) and peak (63 μA) in the reconfigurable switch block operated at 500 MHz at 125 °C.

Challenges and issues with the scaling of low-k/Cu interconnects in ultra-large-scale integration (ULSI) devices are reviewed, and the performance of interconnects is featured by considering the effect of the resistance and capacitance per unit interconnect length or the minimum grid length. The grid-scaled resistance-capacitance (GSRC) model is proposed to compare the interconnect performance at various technology nodes. Introduction of low-k films to reduce the line capacitance improves the per-grid value of the resistance-capacitance product, however, the abrupt increment of the line resistivity due to the small-size effect consumes the benefit of the capacitance beyond 32-nm-node. We also discuss power consumption in interconnects with different low- k structures based on experimental works. Continuous reduction of effective k-value (Keff) is needed to reduce the active power consumption. The way to reduce the interconnect resistance while keeping the interconnect reliability high is a key challenge, particularly for deeply scaled-down ULSIs. © 2009 IEEE.

The preparation of magnesium fluoride (MgF2) thin films on silica glass substrates was studied by a trifluoroacetic acid (TFA) method using trifluoroacetic acid as a fluorine source. The coating solution was prepared by stirring a mixture of magnesium ethoxide, isopropanol and TFA. MgF2 thin films were obtained by heat-treatment of the spin-coated films below 500°C in air. Higher optical transmittance of the films was observed as compared to the substrates. Field emission scanning electron microscope (FE-SEM) observation revealed a particle size of less than 50 nm in the films. The formation process of MgF2 from trifluoroacetate gels was discussed according to the results of the thermal analysis of the gel. © 1997 Elsevier Science S.A.

For high-speed CMOS devices, triple-layered Cu single damascene interconnects (SDI) with Cu-via plugs are fabricated in hybrid dielectric films of plasma-polymerized divinylsiloxan benzocyclobuten film (p-BCB: k=2.6) and p-CVD SiO2. No degradation of 0.1μm MOSFETs is observed after the full interconnect integration through MOCVD-Cu filling and padscanning, local-CMP for Cu polish. The stacked Cu-pads in the high modulus p-BCB film (19Gpa) withstand sever mechanical impact during Al wire bonding. The 0.08μm CMOS transmitter, which consists of 32:8 pre-multiplexer (MUX), 8B10B encorder, 10:1 MUX and DATA driver, is obtained successfully to generate high-speed serial signals up to 6Gb/s. This fabrication process is a key to obtain the high speed CMOS devices with low-k/Cu interconnects.

Low capacitance and highly reliable Cu dual-damascene (DD) interconnects have been developed with self-organized "seamless low-k SiOCH stacks" (SEALS) structure. A carbon-rich sub-nano porous SiOCH (k = 2:5) was directly stacked on an oxygen-rich porous SiOCH (k = 2:7) in the SEALS structure, without a hard-mask (HM) and etch-stop (ES) layer of SiO 2. The effective k-value (k eff) of the Cu DD interconnect including the SiCN capping layer (k = 4:9) was reduced to 2.9 compared to 3.4 on a conventional hybrid structure with SiO 2-HM and ES, which had been used in 65-nm-node mass production. The interconnect delay of a 45-nm-node complementary metal oxide semiconductor (CMOS) ring oscillator (RO) was reduced by 15% referring to that of the conventional hybrid structure. Interconnect reliabilities, such as the interline time dependent dielectric breakdown (TDDB) and thermal cycles, were unchanged from those of the conventional hybrid interconnects. No failure was detected for chip package interaction (CPI) during reliability tests in a plastic ball grid array (PBGA) package. SEALS is a promising structure for scaled down ultra large scale integrations (ULSIs) for highly reliable and high speed operation, and low power consumption. © 2012 The Japan Society of Applied Physics.

Low-pressure chemical vapor deposition of silicon-germanium (Si1-x Gex) and its SPC below 400°C are investigated. The effects of precursor ratio [Si H4 Si H2 Cl2 (DCS):Ge H4], pressure, and temperature are examined with the goals of film composition tunability and high deposition rates. Si H4 is found to be a better source gas than DCS because the decomposition rate of Si H4 is faster than that of DCS during the deposition process. In the Si H4:Ge H4 system, the binary deposition mechanism is well explained by the "enhancement" model. The deposition temperature and chamber pressure affect the conversion factor, enabling independent tuning of the film composition and deposition rate. Amorphous Si0.7 Ge0.3 and Si0.5 Ge0.5 films are obtained at 350 and 400°C by adjusting the deposition conditions while keeping the deposition rates high. Compositional effects of the SiGe films on the SPC are also investigated. © 2008 The Electrochemical Society.

Physical properties and chemical structures of plasma-polymerized Divinylsiloxane Benzocyclobutene polymer film (p-BCB) are investigated by TDS, GIXR, RBS, XPS and SIMS analyses. The p-BCB film has high thermal stability more than 400°C with its low dielectric constant, k=2.5, which is originated from its lower film density than that of the conventional spin-coated BCB film (s-BCB). The p-BCB polymer is predicted to have molecular-scale pores, which are derived from the partial opening of the benzene rings. Some Si-CH3 bonds are replaced by Si-H ones, which are also contribute to the lowering of the dielectric constant as well as the improvement of thermal stability. The p-BCB/Cu interconnects derives 27%-reduction in the inter-line capacitance to the SiO2/Al ones and have a low leak current under 10-12A.

A 28 nm 512 Kb NanoBridge (NB) non-volatile memory is developed for an energy-efficient microcontroller unit. 0.11 pJ/bit read energy is achieved by utilizing an inverter sense scheme thanks to large ON/OFF conductance ratio of a split-electrode NB. The read energy is 71% and 54% less than those of a ReRAM and a silicon oxide nitride oxide silicon commercial embedded NOR flash at the same technology node, respectively. Moreover, a 28 nm 32 bit RISC-V microcontroller unit embedded with a 2 Mb NB non-voltage memory is fabricated and achieves 80 MHz operation frequency.