論文

The quality of robot vision greatly affects the performance of automation systems, where occlusions stand as one of the biggest challenges. If the target is occluded from the sensor, detecting and grasping such objects become very challenging. For example, when multiple robot arms cooperate in a single workplace, occlusions will be created under the robot arm itself and hide objects underneath. While occlusions can be greatly reduced by installing multiple sensors, the increase in sensor costs cannot be ignored. Moreover, the sensor placements must be rearranged every time the robot operation routine and layout change.To diminish occlusions, we propose the first robot vision system with tilt-type mirror reflection sensing. By instantly tilting the sensor itself, we obtain two sensing results with different views: conventional direct line-of-sight sensing and non-line-of-sight sensing via mirror reflections. Our proposed system removes occlusions adaptively by detecting the occlusions in the scene and dynamically configuring the sensor tilt angle to sense the detected occluded area. Thus, sensor rearrangements are not required even after changes in robot operation or layout. Since the required hardware is the tilt-unit and a commercially available mirror, the cost increase is marginal. Through experiments, we show that our system can achieve a similar detection accuracy as systems with multiple sensors, regardless of the single-sensor implementation.

This paper introduces several key RX techniques to realize a 200m-range and low-cost high-pixel-resolution solid-state LiDAR for autonomous self-driving systems. In-Sensor Scanning 2D-SPAD array can remove the mechanical mirror and improve the pixel-resolution by implying short dead time active-quenching SPADs. For ToF calculating SoC, we adopt the world first dual-data converter (DDC) which consolidates the functions of ADC and TDC into a single circuitry, achieving the acquisition of both high-precision time/voltage data from a single input. Such innovations lead us to 200m-range 300×80-pixel solid-state LiDAR RX under 70klux solar radiation.

Real-time CNN-based object detection models for applications like surveillance can achieve high accuracy but are computationally expensive. Recent works have shown 10 to 100× reduction in computation cost for inference by using domain-specific networks. However, prior works have focused on inference only. If the domain model requires frequent retraining, training costs can pose a significant bottleneck. To address this, we propose Dataset Culling: a pipeline to reduce the size of the dataset for training, based on the prediction difficulty. Images that are easy to classify are filtered out since they contribute little to improving the accuracy. The difficulty is measured using our proposed confidence loss metric with little computational overhead. Dataset Culling is extended to optimize the image resolution to further improve training and inference costs. We develop fixed-angle, long-duration video datasets across several domains, and we show that the dataset size can be culled by a factor of 300× to reduce the total training time by 47× with no accuracy loss or even with slight improvement.1

A small gate count 8 bit bidirectional phase domain MAC (PMAC) circuit is proposed for DNN inference applications targeting IoT edge. PMAC consumes significantly smaller power than standard fully digital MACs, owing to its efficient analog accumulation nature based on Gated-Ring-Oscillator (GRO). Compared with the previous first PoC of PMAC, the bidirectional architecture proposed in this paper achieves 20% less gate count, which is comparable with fully digital MACs, and relaxes system design constraints by eliminating phase error originating in leakage current. Asynchronous readout technique and 2-step DTC for the better system throughput and compact implementation, respectively, are presented for the first time. The PMAC achieves peak efficiency of 12.4 TOPS/W in 28 nm CMOS.

PhaseMAC (PMAC), a phase domain Gated-Ring-Oscillator (GRO) based 8bit MAC circuit, is proposed to minimize both area and power consumption of deep learning accelerators. PMAC composes of only digital cells and consumes significantly smaller power than standard digital designs, owing to its efficient analog accumulation nature. It occupies 26.6 times smaller area than conventional analog designs, which is competitive to digital MAC circuits. PMAC achieves a peak efficiency of 14 TOPS/W, which is best reported and 48% higher than conventional arts. Results in anomaly detection tasks are demonstrated, which is the hottest application in the industrial IoT scene.

An exponentially Increasing number of wireless-LAN (WLAN) devices In a dense environment causes a decrease in throughput owing to collisions among the devices and the lack of contiguous bandwidth. The next-generation standard of 802.11ax improves spectrum efficiency by additionally supporting 1024 (1K) QAM, OFDMA with 80+80MHz; these impose several challenges to silicon design. 1K-QAM demands extreme IQ balance with an IRR better than -50dB over a wide frequency range up to 80MHz to achieve at least -35dB RX EVM or less. Noise characteristics better than -44dBc LO integrated phase noise as well as 50dB isolation between each TRX chain are mandatory. To best make use of the essential features defined in the 11ax standard, a real-time and arbitrary spectrum-resource control capability at each access point (AP) is beneficial both in terms of further improvement in spectrum efficiency as well as communication reliability in ISM coexisting bands and legacy WLAN. Interference identification of the order of 10μϵ while incorporating everything into a strictly limited silicon area is key to launching the advanced unique functionality. This paper presents a fully integrated 4×4 802.11abgn/ac/ax-compliant AP transceiver SoC. The chip offers frequency-dependent IQ (FD-IQ) mismatch calibration for both amplitude and phase, low-noise TX BB and multimode LO distribution techniques, and real-time interference detection including 2.4GHz inverter-type microwave (MW) ovens.