論文

Next generation Internet backbone node architectures are proposed that offer sophisticated QoS support including real time voice, videostreaming, and VPN. The backbone core node, named MSN (Multi-service network) Type-X, has 320 Gb/s throughput and IP V.4/V.6 dual stack forwarding capability. Note that, through the employment of state-of-the art VLSI technology, both V.4 and V.6, OC-192C full wire-rate forwarding performance is achieved for the first time. In addition, sophisticated DiffServ with programmable thousands of virtual queues is also proposed to realize a complete set of hardware. In addition, Type-X uses an ATM emulation technique that can into allow the new packet centric backbone to support conventional services. Finally, the paper describes high-reliability techniques such as newly structured service non-stop software and a firmware upgrade technique. These newly proposed techniques and systems will realize the next generation, real time, high-QoS capability, and VPN IP backbone network to be realized.

We propose a buffer management mechanism, called V-WFQ (Virtual Weighted Fair Queueing), for achieving approximately fair bandwidth allocation with a small hardware amount in high-speed networks. The basic process for allocating bandwidth fairly uses selective packet dropping to compare the measured input rate of the flow with an estimated fair bandwidth share. Though V-WFQ is a hardware-efficient FIFO-based algorithm, it can achieve almost ideal fairness in bandwidth allocation. Simulation results show that V-WFQ achieves a good balance between fairness and link utilization under various simulation conditions.

This paper describes multilayer traffic engineering and signaling technologies in a photonic-GMPLS-router network. Multilayer traffic engineering, which yields the dynamic cooperation of IP and photonic layers, is described to provide IP services cost-effectively. To realize multilayer traffic engineering, we propose the OSPF extension, which advertises both the number of total wavelengths and the number of unreserved wavelengths, and the RSVP-TE extension, which realizes the least number of wavelength conversions. In addition, this paper presents a heuristic-based multilayer topology design scheme that uses IP traffic measurements in a generalized multiprotocol label switch (GMPLS). Our design scheme yields the optical label switch path (OLSP) network topology, i.e. OLSP placement, that minimizes network cost, in response to fluctuations in IP traffic demand. In other words, the OLSP network topology is dynamically reconfigured to match IP traffic demand. Networks are reconfigured by the proposed scheme so as to utilize the network resources cost-effectively. © 2002 IEICE.

Many address lookup methods on the IP routers have been recently proposed to improve the packet forwarding capability; nevertheless, their performance prediction is very limited because of lack of considering actual traffic characteristics in their evaluations. It is necessary to consider actual traffic to predict more realistic performances on routers, specially in case of layers 3 and 4 switches whose performances are more influenced by flow characteristic. In this paper, we propose new methods for predicting the router's performance based on the statistical analysis of the Internet traffic. We also present an example of its application to the existing table lookup algorithm, and show that simulation results based on our method can provide accurate performance prediction.

A new scheduling algorithm that concatenates data blocks to increase switching throughput is proposed. The algorithm controls the degree of concatenation and reduces the number of switching instances to improve switch utilization. The switch architecture uses a virtual output queue switching architecture where the core switch fabric is an optical matrix switch. The optical matrix switch requires the guard-time overhead needed for optical switch control. By reducing the number of switching instances, guard-time overhead can be reduced and switch utilization can be improved. Computer simulations show that efficiency is dramatically increased and that fairness in terms of data throughput among output ports is achieved.

The hardware architecture of a 5-Tbit/s FB (Frame-Based) ATM switching system OPTIMA-2 (OPTically Interconnected Distributed Multi-stage Tbit/s-ATM switching Network Architecture -2) is described. OPTIMA-2 has a non-blocking 3-stage switch architecture employing optical WDM links and dynamic bandwidth sharing. The WDM links are composed of a sender port, wavelength AWG router and receiver port. The sender port at the output port of a switch-element allocates a packet to one of eight WDM wavelengths and transmits it. The receiver port receives packets of all eight wavelengths via the wavelength AWG router and merges them at an input port of the next-stage switch-element. Total bandwidth is limited to 10 Gbit/s, but the maximum bandwidth of each wavelength is designed to be 2.5 Gbit/s to prevent the statistical multiplexing gain from falling. A scheduler, which selects variable-length packets from the eight wavelengths, can keep fairness and a small delay. The bandwidth of each wavelength is changed dynami cally by the system so that the traffic in each wavelength is equally distributed among the total bandwidth. In OPTIMA-2, variable-length FB-ATM cell, which is familiar with the IP packet, can be switched while keeping the throughput fairness.

This paper describes a Wavelength-Division-Multiplexing (WDM) optical switching technique that achieves 5-Tb/s switch throughput. This technique is employed in our previously described OPTically Interconnected Distributed Multi-stage Tb/s-ATM switching Network Architecture, called OPTIMA-2. This is a scalable and non-blocking 3-stage switch employing optical WDM and dynamic bandwidth sharing. An inter-stage, cell-based WDM switch is fabricated in combination with field programmable gate arrays (FPGAs) and 2.5-Gb/s 8-wavelength optical interconnection modules. Experimental results from a 5-Tb/s switching system are introduced.

This paper describes the hardware architecture and performance of a 5-Tb/s frame-based (FB) ATM switching system OPTIMA-2 (OPTically Interconnected Distributed Multi-stage TB/s-ATM switching Network Architecture -2). First, we describe the switch architecture, which is a non-blocking 3-stage switch using optical wavelength division multiplexing (WDM) and dynamic bandwidth sharing technique. Variable-length FB-ATM cells, which can encapsulate IP packets, can be switched while keeping throughput fairness. Second, we propose a scheduling technique for variable-length packets used in the WDM system which selects packets from the eight wavelengths. We show that the scheduling technique can keep fairness and a small delay for variable-length packets. A pipelined-scheduling technique for variable-length packets is also proposed for a high-speed and large-capacity switching system.

An architecture is described for a switch that is suitable for future large-scale packet-convergence networks. This optically interconnected multi-stage ATM switch architecture (OPTIMA) is a multi-stage switch architecture, and an OPTIMA switch can perform two types of QoS switching. The architecture is scalable - switching capacity can be expanded by interconnecting identical unit switches, without causing degradation in switching performance, because of the switch's route-control mechanism for high-priority traffic and its self-load balancing mechanism for low-priority traffic. Analysis and simulation demonstrated that an OPTIMA switch has high-performance switching capability. Also described is the hardware architecture for the 640 Gbit/s OPTIMA switching system. The OPTIMA switch is suitable for use as a backbone node in future packet-convergence networks.

Breakthrough technologies are described for switching hardware and system integration that will enable the development of a Tbit/s-class switching system for multi-service backbone networks. Also described is a switching architecture that is familiar with IP traffic while retaining the advantages of a conventional ATM switch. Following papers describe the newly developed 640-Gbit/s OPTIMA (OPTically Interconnected Multi-stage ATM switch architecture) switching system, including the 640-Gbit/s switching system architecture, 80-Gbit/s switch-element architecture, hardware architecture, and packaging technique.

The adaptive rate control technique AREX (Adaptive Remote rate control based on Extrapolation) is proposed, which realizes an access to a high-speed bandwidth and a high utilization rate without increase of required buffer amount and degradation of the transfer characteristics, even in an ATM (Asynchronous Transfer Mode) network with a long delay, by carrying out prediction of congestion based on periodically reported information on the utilization rate. In the AREX method, the downstream node (Obsv node) without a rate modification capability observes the utilization rate of the output link and informs the upstream node (Cntl node) with a rate control capability. Based on the information, the Cntl node controls the output rate dynamically. In the conventional feedback rate control, only past information can be obtained due to propagation delay, and the information is given only at an appropriate notification interval. Therefore, as the network size is increased, the necessary amount of buffers is increased, or the response speed for the bandwidth modification request from users needs to be reduced. However, since the worst traffic is estimated from the notification information in the AREX method, a safe rate control can be realized even if the notification is delayed and is given intermittently. Also, by regulating the rate enhancement ratio as an appropriate increasing function, quick access to a large bandwidth can be realized at low load, and a high congestion control effect is achieved at high load. © 2000 Scripta Technica.