Published papers
Amano, Hideharu
121-140 items (total 243)
A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOA Technology with Reverse Body Bias Assisted Sleep Mode
- Author
- AMANO HIDEHARU
- Publication Title
- Magazine name IEICE Trans. on Electronics Volume E98-C(Issue 2) Start Page 153 - End Page 162 (Publication Date）2015/02）
- Publication Category
- Research paper (scientific journal)
A toolchain for Dynamic Function Off-load on CPU-FPGA Platforms
- Author
- AMANO HIDEHARU
- Publication Title
- Magazine name Journal of Information Processing Volume 23(Issue 2) Start Page 153 - End Page 162 (Publication Date）2015/02）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
A Co-Processor Design for an Energy Efficient Reconfigurable Accelerator CMA
- Author
- Mai Izawa, Nobuaki Ozaki, Yusuke Koizumi, Rie Uno, Hideharu Amano
- Publication Title
- Magazine name International Journal of Networking and Computing Volume 5(Issue 1) Start Page 239 - End Page 251 (Publication Date）2015/01）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
Accelerator-in-Switch: a framework for tightly couple switching hub and an accelerator with FPGA
- Author
- Chiharu Tsuruta, Takahiro Kaneda, Naoki Nishikawa, Hideharu Amano
- Publication Title
- Magazine name International Conference on Filed Programmable Logic and Applications (Publication Date）2018/09）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Implementation of Bitsliced AES Encryption on CUDA-Enabled GPU
- Author
- Naoki Nishikawa, Hideharu Amano, Keisuke Iwai
- Publication Title
- Magazine name International Conference on Network and System Security (Publication Date）2018/08）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Optimization of Body Biasing for Variable Pipelined Coarse Grained Reconfigurable Architecture
- Author
- Takuya Kojima, Naoki Ando, Anh Vu Doan, Hideharu Amano
- Publication Title
- Magazine name IEICE Transactions on Information and Systems Volume E10－D(Issue 6) (Publication Date）2018/08）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
低電力再構成アクセラレータの実装と評価
- Author
- 増山滉一郎、藤田悠、奥原颯、天野 英晴
- Publication Title
- (Publication Date）2018/06）
- Peer-review Status
- With
Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface
- Author
- Akio Nomura, Yusuke Matsushita, Junichiro Kadomoto, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano
- Publication Title
- Magazine name International Journal of Network and Computing Volume Vol.8(Issue 1) Start Page 124 - End Page 139 (Publication Date）2018/01）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface
- Author
- Akio Nomura, Yusuke Matsushita, Junichiro Kadomoto, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano
- Publication Title
- Magazine name International Journal of Network and Computing Volume Vol.8(Issue 1) Start Page 124 - End Page 139 (Publication Date）2018/01）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
HiRy: An Advanced Theory on Design of Deadlock-free Adaptive Routing for Arbitary Topologies
- Author
- R.Kawano, R.Yasudo, H.Matsutani, M.Koibuchi, H.Amano
- Publication Title
- Magazine name International Conference on Parallel and Distributed Systems (Publication Date）2017/12）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Glidge aware variable pipeline optimization for CGRAs
- Author
- T.Kojima, N.Ando, H.Okuhara, H.Amano
- Publication Title
- Magazine name International Conference on ReConGigurable Computing and FPGAs (Publication Date）2017/12）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Body Bias Domain Partitioning Size Exploration for a Coarse Grained Reconfigurable Accerelator
- Author
- Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Ryuta Kawano, Hideharu Amano
- Publication Title
- Magazine name IEICE Transactions on Information and Systems Volume E100-D(Issue 12) Start Page 2828 - End Page 2836 (Publication Date）2017/12）
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
The Design and Implementation of Scalable Deep Neural Network Accelerator Core
- Author
- R.Sakamoto, R.Takata, J.Isihi, M.Kondo, H.Nakamura, T.Ohkubo, T.Kojima, H.Amano
- Publication Title
- Magazine name IEEE International Symposium on Embedded Multicore/Many-core Systems-on-chip (Publication Date）2017/09）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
XYZ-Randomization using TSVs for Low-Latency Energy Efficient 3D-NOCs
- Author
- Hiroshi Nakahara, N.V.A.Doan, Ryota Yasudo, Hideharu Amano
- Publication Title
- Magazine name International Symposium on Network-on-Chip (Publication Date）2017/09）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Order/Radix Problem: Towards Low End-to-End Latency Interconnection Networks
- Author
- Ryota Yasudo, Michihiro Koibuchi, Koji Nakano, Hiroki Matsutani, Hideharu Amano
- Publication Title
- Magazine name International Conference on Parallel Processing (Publication Date）2017/08）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Performance Evaluation of PEACH3: Field Programmable Gate Array Switch for Tightly Coupled Accelerators
- Author
- Takahiro Kaneda, Toshihiro Hanawa, Chiharu Tsuruta, Hideharu Amano
- Publication Title
- Magazine name International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (Publication Date）2017/06）
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Acceleration of the aggregation process in a Hall-thruster simulation using Intel FPGA SDK for OpenCL
- Author
- Hiroyuki Noda, Ryotaro Sakai, Takaaki Miyajima, Naoyuki Fujita, Hideharu Amano
- Publication Title
- Magazine name Proc. of International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART2017) (Publication Date）2017/06）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Power Optimization Methodology for Ultra Low Power Microcontroller with Silicon on Thin BOX MOSFET
- Author
- H.Okuhara, Y.Fujita, K.Usami, H.Amano
- Publication Title
- Magazine name IEEE Trans. on VLSI Systems Volume 25(Issue 4) Start Page 1578 - End Page 1582 (Publication Date）2017/04）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With
NAMACHA: A software edevelopment environment for a mutli-chip convolutional network accelerator
- Author
- #H
- Publication Title
- Magazine name CATA2017, (Publication Date）2017/03）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (international conference proceedings)
- Peer-review Status
- With
Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers
- Author
- R.Yasudo, H.Matsutani, M.Koibuchi, H.Amano, T.Nakamura
- Publication Title
- Magazine name IEEE Trans. on Computers Volume 66(Issue 4) Start Page 702 - End Page 716 (Publication Date）2017/03）
- Authorship Category
- Joint Work
- Publication Category
- Research paper (scientific journal)
- Peer-review Status
- With