Published papers

In recent days, minimally invasive surgery by using endoscope has spread and robots that support endoscopic surgery are being focused on. However, existing surgery robots could not transmit information of tactile sensation to operators. To improve the safety of robotic surgery, it is required to transmit the tactile sensation to the operator. To attain that need, a teleoperation method called bilateral has developed and we have achieved to transmit keen tactile sensation with one degree-of-freedom forceps robots. In this paper, multi degrees-of-freedom bilateral forceps robot system will be developed to make surgery robot adaptable to actual situation of the surgery. In bilateral teleoperation of multi degrees-of-freedom robots, environmental information of master and slave should be exchanged in common coordinates. In this paper, mode coordinates is used as common coordinates. Mode coordinates are closely related to the motion of the robot. Method to decouple the mechanical interference on mode coordinate is proposed. The paper also proposes a controller implemented on FPGA to achieve short processing time and hard-realtime control. As a result, multi-degrees-of freedom force feedback is attained. The experimental results show the viability of the proposed method.

In this paper, a network interface controller for RHiNET, which is called Martini is described. Martini supports user level zero-processor-copy communication and makes good use of low latency, high bandwidth RHiNET network. While Martini processes fundamental RDMA and PIG-based transfer functions by hard-wired logic, it is provided with an on-core processor to support complex functions flexibly.

我々は、PCやWSを相互に接続して効率の良い並列処理を行うための通信アーキテクチャRHiNETの開発を行っている.RHiNETでは, 1箇所に集められた計算機だけでなく, ビル内やフロア内に設置され日常の業務に使用されている計算機を並列処理に利用する.RHiNETで用いるネットワークには, 高性能計算のための高い実効バンド幅と小さなレイテンシ, 及びビル内やフロア内の計算機を接続するためのリンク長と自由なトポロジーが求められる.従来のLANでは、スイッチに大容量のメモリをもつことにより両方の条件を満たす.本論文ではRHiNETのネットワークで用いるスイッチRHiNET / SW1のアーキテクチャと実装について述べる.RHiNET / SW1では, スイッチASIC外部にSRAMによる大容量パケットバッファを備え, 仮想チャネルキャッシュと呼ぶ手法を用いている.また, シミュレータによる性能評価も示す.

The cache-based packet-processing enginge (PPE) that consists of Process-Learning Cache (PLC) and Cache-Miss Handler (CMH) is proposed to achieve 100-Gbps (Gigabit per second) wire-rate throughput which would be needed for backbone routers in 2007 or later to support broadband network. In this paper, several technical requirements and those solutions for cache-based PPE are shown. Also details of a prototype of the cache-based PPE are shown. By using real network traffic traces, we show the cache-based PPE can achieve the wire-rate throughput. As another aspect, PPEs are required low power consumption. In our estimation, the cache-based PPE can be constructed about 46% LSI-die size and power consumption of a conventional PPE.

正規表現は，ネットワーク侵入検知システム （NIDS） などをはじめ様々なネットワークアプリケーションで広く使われている．しかしこれらの多くはソフトウェアベースのため処理速度が遅くネットワークのサービス品質に影響を及ぼしている．高速な処理を妨げる要因の一つは処理時間の大半を占めるパターンマッチングである．NIDS のパターンマッチングに用いられるパターン数は膨大であり，かつ複雑な正規表現も含まれている．このような膨大かつ複雑な正規表現を高速で処理できるエンジンのニーズは高い．本論文では膨大なパターン処理を可能とするパターン絞り込み機構を提案する．Regular-expression is widely used in various network applications, such as a network intrusion detection system (NIDS). However, high-throughput regular-expression execution couldn't achieve enough processing throughput because most of NIDSs have been implemented by software. Pattern matching function, which is a part of regular-expression processing， requires comparatively longer processing time. A huge amount of patterns are used for this pattern matching in NIDS. High-throughput processing engine are strongly required in order to execute a large number of complicated regular expression. In this paper, a pattern filtering architecture is discussed that enables to achieve a large number of patterns matching.

Recursive Diagonal Torus (RDT), a class of interconnection network is proposed for massively parallel computers with up to 2 16 nodes. By making the best use of a recursively structured diagonal mesh (torus) connection, the RDT has a smaller diameter (e.g., it is 11 for 2 16 nodes) with a smaller number of links per node (i.e., 8 links per node) than those of the hypercube, A simple routing algorithm, called vector routing, which is near-optimal and easy to implement is also proposed. Although the congestion on upper rank tori sometimes degrades the performance under the random traffic, the RDT provides much better performance than that of a 2D/3D torus in most cases and, under hot spot traffic, the RDT provides much better performance than that of a 2D/3D/4D torus. The RDT router chip which provides a message multicast for maintaining cache consistency is available. Using the 0.5μm BiCMOS SOG technology, versatile functions, including hierarchical multicasting, combining acknowledge packets, shooting down/restart mechanism, and time-out/setup mechanisms, work at a 60MHz clock rate.

This paper focuses on the realization of high-performance motion control based on acceleration control. The characteristics of acceleration control are investigated and the relationship between the performance and sampling frequency of the system is discussed. This paper then describes that a higher sampling frequency is required for acquisition of output information than for updating the input value. Based on this idea, a new multirate sampling method for an acceleration control system is proposed. A disturbance observer for the multirate system is designed by adopting a new definition of disturbance torque. A bilateral system is introduced as a preeminent example of a system that requires robust acceleration control. Both simulations and experiments are performed on the system, and the validity of the proposition is verified by the results. © 2007 Wiley Periodicals, Inc.