Published papers

This work proposes an evaluation technique of self-heating (SH) in a 65-nm bulk CMOS transistor at cryogenic temperature (4.2K). For the in-situ monitoring of self-heating in cryo-CMOS circuits, transient response of the subthreshold drain current is used, which makes it possible to estimate the temperature at on-state of MOSFETs. The relation between the temperature increase by self-heating and power consumption of MOSFET has been experimentally obtained, which will help a design of high performance cryo-CMOS circuits for quantum computer application.