February 19, 2024
Keio University
Japan Science and Technology Agency (JST)
To promote the application of artificial intelligence (AI) to more familiar devices with the spread of edge computing, Kentaro Yoshioka, a full-time lecturer at the Department of Electronics and Electrical Engineering, Faculty of Science and Technology, Keio University, has developed a high-precision and energy-efficient compute-in-memory (CIM) circuit that enables highly efficient inference for deep neural networks (DNNs), particularly for Transformer processing.
This study proposes a "Capacitance Reconfigurable CIM (CR-CIM)" structure that integrates data storage, computation, and analog-to-digital (A/D) conversion into a single memory cell. This was done to achieve the computational precision required for Transformer inference, a challenge for conventional CIMs. This structure is the first analog CIM to achieve the necessary computational precision for Transformer processing, while also realizing extremely high power efficiency at 818 TOPS (tera operations per second) per watt. Furthermore, when performing convolutional neural network (CNN) processing, it achieves an energy efficiency of 4094 TOPS/W, which is 10 times higher than conventional technologies with comparable computational precision.
The results of this research will contribute to the development of AI hardware that is efficient in terms of both power efficiency and processing speed in the fields of edge computing and AI. It is also expected that in the future, this will make AI services such as large language models (LLMs) more accessible to a larger number of people.
The details of this research were presented at the ISSCC 2024 (International Solid-State Circuits Conference), held from February 18, US time. ISSCC is often referred to as the "Olympics of integrated circuits" and is the most prestigious international conference in the field.
For the full press release, please see below.